Recently, with the development of semiconductor technology and manufacturing art, thin film transistor liquid crystal display (TFT-LCD) has the features of higher quality, lower power consumption, less radiation, and smaller size so it is gradually becoming a mainstream product in the market. An LCD panel generally comprises an array substrate of thin film transistors, a color filter substrate, and a layer of liquid crystal material between the thin film transistor array substrate and the color filter substrate. A plurality of scan lines are vertically interlaced with a plurality of data lines on the array substrate which delimits a plurality of pixel areas, and a plurality of pixel driving circuits driving the pixels. Wherein the color filter substrate is a transparent glass substrate, a transparent conductive film formed on the thereof by sputtering of indium-tin oxide (ITO) or indium zinc oxide (IZO). The transparent conductive film electrically connects a power source of the common electrode and the corresponding pixel electrode provided on the array substrate to produce a predetermined voltage in order to control the twist of the LCD panel.
Referring to FIGS. 1 and 2, a traditional LCD panel is disclosed and comprises a plurality of data lines, a plurality of scan lines, and a plurality of pixel driving circuits. In FIG. 1, two data lines 11 and a scan line 12 are shown for illustration. The scan line 12 is vertically interlaced with the data lines 11 on an array substrate 14 and the pixel driving circuits 13 are disposed between the corresponding scan line 12 and the corresponding data line 11. The data lines 11 and scan lines 12 are generally made of a single metal in order to vertically align, since the impedance of the metal line is inversely proportional to the thickness of the thereof, and the impedance of a single metal is higher. Referring to FIG. 3, the impedance of the scan line 12 is too high thus resulting in the delay of the signal of a gate. This produces problems of wrong charge, crosstalk and fan-out mura. Even if the impedance of the scan line 12 is reduced by increasing the width of the line or by increasing the thickness of the line to solve the problems, which lead to the increase of the capacitance value or the process becomes more difficult and more line material is wasted. Therefore, these problems still cannot be solved,